OT3122bj 600MHz GP PLL for ams 180nm

The OT3122bj is a flexible clock multiplier PLL function with a wide range of input and output frequencies and is designed for the ams C18 and A18 0.18µ digital or high voltage CMOS processes. The design features an advanced multi-stage balanced VCO for exceptional cycle to cycle jitter performance.

OT3122 PLL
OT3122 PLL

Features

  • Wide range N, M, P integer dividers.
  • 40MHz – 600MHz output frequency range.
  • Comparable frequency range 8MHz – 50MHz.
  • 18pS RMS cycle to cycle jitter at 600MHz.
  • Lock-detect function.
  • Bypass function.
  • Well defined startup behavior.
  • -40°C to 140°C temperature operation.
  • Available divider selection program.
  • Small cell area: 0.06mm2 in 0.18µ CMOS.
  • 3mW typical power dissipation.
  • 1.8V digital and analog supplies.
  • 0.18µ CMOS process compatibility.
  • Only 1.8V transistors are used in the design.
  • Silicon proven architecture.

Contact info@ot1.com for further information.