BFSK Transceiver IP
Analog Front End Chip IP
The OTI912x is a symbol level BFSK transceiver front end for data communication over low voltage power cords. Supports USB Power Delivery FM communication standard. Designed to be highly flexible to accommodate a wide range of power cord communication applications.
Features IP Overview
- Silicon proven in the OTC9102, and 3 customer chips.
- Available Obsidian RTL/C implementation of protocol and policy layers. (Demo board available)
- Supports 1.2 USB PD communication and cable marker standard.
- Uses low cost inductor and capacitor to isolate power communication signals.
- 18-25MHz carrier frequency range.
- High DC wonder tolerance allows for uncoded data streams.
- Integrated receive filter provides high tolerance to power line noise.
- Very low power squelch only active circuit in suspend mode.
- Loop back capable.
- Low cost CMOS process technology.
- See the technology in action.
- Generic wireline communications.
- V1 Power Delivery Devices.
- V1 Power Delivery hubs.
- Wall chargers.
- Data sheets for mixed signal IP, RTL, and software.
- GDS layout, and layout outline.
- LVS netlist.
- Integration notes.
- Verilog model.
- Timing model.
- RTL source code.
- C software source code.
As with most Obsidian products, source code is optionally available with training and installation on customers systems such that the full technology can be effectively transferred.