Mixed Signal Design

We offer World class CMOS and bipolar, transistor level, design experience:

  • Pipeline ADC

  • DAC / Video DAC

  • CDR / PLL to 1600MHz

  • Analog Front End for 100Base-TX, 100Base-T2, 10GBase-T, USB, DDR etc.
  • Analog hybrid

  • On chip power regulator

  • Switching regulator

  • High performance crystal oscillators 32KHz - 80MHz

  • IO Cells: LVTTL, CML, LVDS, USB, PECL, CMOS

  • High performance amplifiers including chopper, fully differential etc

  • Regulated negative substrate bias generator

  • Precision band gap

  • Power on reset

  • Temperature measurement

Mixed Signal Modelling

  • Verilog
  • Veriloga / Spice
  • Matlab/Simulink
  • Cadence
 
Highlights

05/03/10 - Tapeout for 10b pipeline ADC complete.

01/28/10 - JPL Simulogic chip fully functional!
 
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