Obsidian IP Products

CMOS IP

Matlab/Simulink Architecture Models

  • 100Base-T DSP based transceiver model
  • 1000Base-T DSP based transceiver model
  • 10GBase-T Single channel transceiver model
  • Matlab cable model set derived from real UTP Cat5 fixures

Firmware/System

  • Audio Active Noise Cancellation
  • Temperature compensated RMS current meter

 

 
Highlights

05/03/10 - Tapeout for 10b pipeline ADC complete.

01/28/10 - JPL Simulogic chip fully functional!
 
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