chip2x400IP Demonstrator Chip

A device primarily designed for testing and evaluation of front end mixed signal ip. Included in this device:

  • 10 bit pipelined analog to digital converter (ADC).
  • General purpose programmable phase locked loop (PLL).
  • A research structure for a metal and field programmable mixed signal ASIC
  • A temperature coefficient trimable precision bandgap reference.
  • A low dropout regulator (LDO)
  • A process specific IO library.