IO Design Background

Obsidian's IO design background includes:

  • General purpose IO sets down to 55n
  • LVTTL
  • PECL
  • CML
  • LVDS to 800MHz
  • 4 Level IO
  • 5V tolerant
  • Low power crystal oscillator
  • I2C, USB1.1, USB2.0, 100Base-TX, 1000Base-T

tpadlogic1s

highlights

2/21/17 - OT ships ams aH18 clock mutiplier PLL.

12/9/16 - New USB PD Development board.

5/22/16 - OT ships 130nm USB Type-C IP.

4/1/15 - Obsidian Announces USB 3.1 Cable Marker Chip. See more.

5/8/14 - Obsidian demonstates USB PD over Type-C. See more.

11/4/13 - Obsidian ships 4th PD IP version.

1/15/13 - Obsidian provides technology for CES demo.


 
USB Power Delivery IP

12/5/10 - 0.35ยต Ip demo chip functional.